I’m currently a PhD student in Hara Lab at Tokyo Tech, supervised by Prof. Yuko Hara. I’m now working on FPGA-based ML accelerator design for IoT security scene.
PhD in Information and Communications Engineering, 2023.10 ~ present
Tokyo Institute of Technology
MEng in Information and Communications Engineering, 2021.10 ~ 2023.09
Tokyo Institute of Technology
BEng in VLSI Design & System Integration, 2017.09 ~ 2021.06
Nanjing University
FPGA application, AI accelerator design
Machine learning
DL-based NIDS, FPGA-accelerated NIDS
I worked as a short-term researcher. The project codes and document are available through the link. My major research content included: