I’m currently a PhD student in Hara Lab at Tokyo Tech, supervised by Prof. Yuko Hara. I’m now working on FPGA-based ML accelerator design for IoT security scene. This homepage is built with Hugo template. I’m now updating it.
PhD in Information and Communications Engineering, 2023-2026
Tokyo Institute of Technology
MEng in Information and Communications Engineering, 2021-2023
Tokyo Institute of Technology
BEng in VLSI Design & System Integration, 2017-2021
Nanjing University
FPGA application, AI accelerator design
Machine learning
DL-based NIDS, FPGA-accelerated NIDS
I worked as a short-term researcher, under supervision of Prof. Jean Pierre DAVID. My major research content included: