Biography
I’m currently a master student in Hara Lab at Tokyo Tech, supervised by Prof. Yuko Hara. I’m now working on FPGA-based ML accelerator design for IoT security scene. This is my brand new homepage, so that I’ll update regularly.
我现在是东京工业大学原研究室的一名硕士研究生。我目前进行的工作是物联网安全场景的基于FPGA机器学习加速器设计。这是新的主页，所以我会定期更新。
Interests
- FPGA
- Efficient Machine Learning
- Embedded System
- IoT Security
- RISC-V
- Computer Architecture
Education
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MEng in Information and Communications Engineering, 2021-2023
Tokyo Institute of Technology
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BEng in VLSI Design & System Integration, 2017-2021
Nanjing University